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| 74AC138 3 TO 8 LINE DECODER (INVERTING) s s s s s s s s s HIGH SPEED: tPD =4.5 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 8 A (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) 50 TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 138 IMPROVED LATCH-UP IMMUNITY B M (Plastic Package) (Micro Package) ORDER CODES : 74AC138B go low. If enable input G1 is held low or either G2A or G2B is held high, the decoding function is inhibited and all the 8 outputs go to high. Tree enable inputs are provided to ease cascade connection and application of address decoders for memory systems. It is ideal for low power applications mantaining high speed operation similar to equivalent Bipolar Schottky TTL. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. DESCRIPTION The AC138 is an advanced high-speed CMOS 3 TO 8 LINE DECODER (INVERTING) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. If the device is enabled, 3 binary select inputs (A, B and C) determine which one of the outputs will PIN CONNECTION AND IEC LOGIC SYMBOLS April 1997 1/9 74AC138 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 2, 3 4, 5 6 15, 14, 13, 12, 11, 10, 9, 7 8 16 SYMBOL A, B, C G2A, G2B G1 Y0 to Y7 NAME AND F UNCTIO N Address Inputs Enable Inputs Enable Input Outputs GND VCC Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS ENABL E G 2B G2A G1 C X X L X X H X X H X X X L L H L L L H L L L H L L L H L L L H H L L H H L L H H L L H H X: Don't Care OUTPUTS SEL ECT B X X X L L H H L L H H A X X X L H L H L H L H Y0 H H H L H H H H H H H Y1 H H H H L H H H H H H Y2 H H H H H L H H H H H Y3 H H H H H H L H H H H Y4 H H H H H H H L H H H Y5 H H H H H H H H L H H Y6 H H H H H H H H H L H Y7 H H H H H H H H H H L LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays 2/9 74AC138 ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 20 20 50 400 -65 to +150 300 Unit V V V mA mA mA mA o o ICC or IGND DC VCC or Ground Current C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top dt/dv Supply Voltage Input Voltage Output Voltage Operating Temperature: Input Rise and Fall Time VCC = 3.0, 4.5 or 5.5 V(note 1) Parameter Value 2 to 6 0 to VCC 0 to VCC -40 to +85 8 Un it V V V o C ns/V 1) VIN from 30% to 70% of VCC 3/9 74AC138 DC SPECIFICATIONS Symbol Parameter V CC (V) VIH High Level Input Voltage 3.0 4.5 5.5 VIL Low Level Input Voltage 3.0 4.5 5.5 VOH High Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 VOL Low Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 II ICC IOLD IOHD Input Leakage Current Quiescent Supply Current Dynamic Output Current (note 1, 2) 5.5 5.5 5.5 V I (*) = V IH or V IL VI = V IH or V IL (*) Test Con dition s Min. VO = 0.1 V or VCC - 0.1 V VO = 0.1 V or VCC - 0.1 V I O=-50 A IO=-50 A IO=-50 A IO=-12 mA IO=-24 mA IO=-24 mA IO=50 A IO=50 A IO=50 A IO=12 mA IO=24 mA IO=24 mA VI = VCC or GND VI = VCC or GND VOLD = 1.65 V max VOHD = 3.85 V min 2.9 4.4 5.4 2.56 3.86 4.86 0.002 0.001 0.001 2.1 3.15 3.85 Typ. 1.5 2.25 2.75 1.5 2.25 2.75 2.99 4.49 5.49 Value T A = 25 oC Max. -40 to 85 o C Min . 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.46 3.76 4.76 0.1 0.1 0.1 0.36 0.36 0.36 0.1 8 0.1 0.1 0.1 0.44 0.44 0.44 1 80 75 -75 0.9 1.35 1.65 Max. Unit V V V V A A mA mA 1) Maximum test duration 2ms, one output loaded at time 2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50 . (*) All outputs loaded. 4/9 74AC138 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 , Input tr = t f =3 ns) Symbol Parameter V CC (V) tPLH tPHL tPLH tPHL tPLH tPHL Propagation Delay Time A,B,C to Y Propagation Delay Time G1to Y Propagation Delay Time G2A or G2B to Y 3.3 5.0(**) 3.3(*) 5.0 (**) (*) T est Cond ition Value T A = 25 oC -40 to 85 o C Min. Typ. Max. Min . Max. 1.5 1.5 1.5 1.5 1.5 1.5 5.5 4.5 6 4.5 5.5 4.5 13 9 13 11 13 9 1.5 1.5 1.5 1.5 1.5 1.5 14 10 14 12 14 10 Unit ns ns ns 3.3(*) 5.0(**) (*) Voltage range is 3.3V 0.3V (**) Voltage range is 5V 0.5V CAPACITIVE CHARACTERISTICS Symbol Parameter V CC (V) CIN C PD Input Capacitance Power Dissipation Capacitance (note 1) 5.0 5.0 Test Con dition s o Value T A = 25 C Min. Typ. 4 60 Max. -40 to 85 C Min . Max. o Unit pF pF 1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD * VCC * fIN + ICC/n (per circuit) TEST CIRCUIT CL = 50 pF or equivalent (includes jig and probe capacitance) RL = R1 = 500 or equivalent RT =ZOUT of pulse generator (typically 50) 5/9 74AC138 WAVEFORM 1: PROPAGATION DELAYS FOR INVERTING OUTPUTS (f=1MHz; 50% duty cycle) WAVEFORM 2: PROPAGATION DELAYS FOR NON-INVERTING OUTPUTS (f=1MHz; 50% duty cycle) 6/9 74AC138 Plastic DIP16 (0.25) MECHANICAL DATA mm MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP. MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 inch TYP. MAX. DIM. P001C 7/9 74AC138 SO16 MECHANICAL DATA DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8 (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45 (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm TYP. MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.004 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010 P013H 8/9 74AC138 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersede and replaces all information previously supplied. s SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. (c) 1997 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A . 9/9 |
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